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Micrel
Figure 8. Example of a Data Profile
For best results, they should always be optimiz e d for
the data pattern u sed. As the baud rate increases, the
c apac itor value s de crea se. Tabl e 8 show s sugg es ted
values for Manches ter E ncoded data, 50% duty cycle.
MICRF219
SE L0
JP 1
Short
Open
Short
Open
SEL 1
JP2
Short
Short
Open
Open
De mod.
BW
(Hz)
1625
3250
6500
13000
Cth
100nF
47nF
22nF
10nF
Cagc
4.7μF
2.2μF
1μF
0.47μF
Figure 9. Data Out Pin with No Squelch (SQ = 1)
Table 8. Suggested C TH and C AGC Val ues
JP3 and JP4 are jumpers selectable to h igh or lo w
and used to configure the digital squelch fun c tio n.
When it is tied to high, there is no squelch ap p lied to
the digital circuits and the DO (data out) pin has a
hash signal. When the pin is low, the DO pi n act ivity is
considerably reduced. It will have more or les s than
shown in the figure below depending upon the o utside
band noise. The penalty for using squelch is a d elay in
getting a good signal in the DO pin. This means that it
takes longer for the data to show up. The de lay is
dependent upon many factors such as RF signal
intensity, data profile, data rate, C TH and C AGC
capacitor values, and outside band noise See Figure
9 and Figure 10. Please note that Squelch action is
based on the Bitcheck operation and may be
optimized using the Bitcheck Window serial register
setting.
Figure 10. Data Out Pin with Squelch (SQ = 0)
Other compo nents used are C5, which is a decoupling
capacitor for the V DD line; R3 for the shutdown pin
(SHDN = 0, device is operation), which can be
removed if that pin is connected to a microcontroller or
an external switch; and R1 and R2 which form a
voltage divider for the AGC pin. One can force a
voltage in this AGC pin to purposely decrease the
device sensitivity. Special care is needed when doing
this operation, as an external control of the AGC
voltage may vary from lot to lot and may not work the
same in several devices.
June 2011
16
M9999-060811
(408) 944-0800
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